Global Specialties Corporation's multi-family Logic Probe, LP-1, detects, memorizes and displays logic levels, pulses and Voltage transients in mixed and single logic family systems. It detects out-of-tolerance logic signals, open circuit nodes, as well as transient events down to 50 nanoseconds while providing the user with an instant easily interpreted high-intensity LED readout. CIRCUIT DESCRIPTION The probe tip of the LP-1 is connected to a dual threshold window comparator and a bi-polar edge detector. The window comparator bias network establishes the LOGIC "1" and LOGIC "0" threshold levels. The levels are fixed in the DTL/TTL mode (2.25 Volts and 0.8 Volts) in the CMOS/HTL mode, the thresholds are determined by the applied Vcc Voltage - LOGIC "1" > 70% Vcc, LOGIC "0" < 30% Vcc. The bi polar edge detector responds to both positive and negative transitions and drives a pulse stretcher circuit. The pulse stretcher converts level transitions as well as narrow pulses to 1/3 of a second pulses that drive one of the three readout LEDs. In the memory mode, the output of the edge detector is fed to a latching flip-flop.