The Model 1600A Logic State Analyzer is designed to aid in the analyses of digital systems which depend on sequences of logic states to control their operation. The 1600A provides a functional display of ones and zeros in a tabular format of logic states with up to 16 variables in a digital system (up to 32 variables may be displayed when a Model 1607A Logic State Analyzer is used with the 1600A in the bus mode). Tabular data is displayed in two tables of sixteen 16-bit words. Table A (left half of the CRT screen) is a display of A-memory data acquired from the circuit under test through the 1600A data input connectors. Table B (right half of the CRT screen) is a display of B-memory data (data transferred from A-memory by the STORE A—B pushbutton or Model 1607A input data when the 1600A is connected to 1607A using an I/O Interface Cable), or a display of the exclusive-OR of A-memory and B-memory data. In map-display modes, the 1600A displays digital words (up to sixteen bits in length) as single dots whose location on the CRT screen identifies them uniquely. In the map mode, the 1600A can display up to 65 536 16-bit words (all possible states in a 16-bit state machine).